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sta_basics_course

Introductory course into static timing analysis (STA).

sta_workshop

This repository has all collateral for STA workshop

static-timing-analysis-in-brief

statictiminganalysis

Implementation of Timing Exceptions in RTL design for STA

stdcelllist_sky130

Standard Cells designed for characterization

sutd-term-4-2d

2D Project on (1) 32-bit adder optimization and (2) translating netlist to CNF

synth_opt_adders

Prefix tree adder space exploration library

systemverilog

SystemVerilog for ASIC/FPGA Design & Simulation, with Synopsys Tool Flow

systemverliog-9-tap-digital-filter

Designing a 9-tap digital filter in SystemVerilog, testing it in a behavioural simulation and verifying its output against a software model. Then using Quartus to perform a static timing analysis to ensure that the design meets performance requirements.

tcl-programming

tcl-scripting

Examples of the TCL Scripts for different purposes and for VLSI Physical Design are provided here for your reference

test_wafer_generator

Used to characterization of standard cells and Test structures

testing-of-missing-gate-fault-in-reversible-circuit

Genetic Algorithm based testing of missing gate fault of mixed control Toffoli networks in reversible circuit

thirumagal

tste87

MATLAB code for the lab sessions in the "ASIC for DSP" course at LiU-ISY

upf

Constructs for Unified Low Power Format (UPF) with Verilog/SystemVeriog designs

uvm_testbench_gen

Novel GUI Based UVM Testbench Template Builder

vda

A simple tool being developed for VLSI Design Automation (VDA)

verification-of-a-cominational-adder-using-uvm

verification-of-adder-with-uvm

Verification-of-Adder-with-uvm

verilog-fir

FIR implemention with Verilog

verilog-parser

A Flex/Bison Parser for the IEEE 1364-2001 Verilog Standard.

verilog_cshm

This folder contains all verilog based projects

virtual-fpga-lab

This repository contains the codebase for Virtual FPGA Lab in Makerchip contributing as a participant in Google Summer of Code 2021, under FOSSi Foundation.

visruat-vsd-hdp

all material for the VSD-HDP program

vlsi

contains all the practice codes for perl, TCL and python

vlsi-circuit-implementation-with-python

vlsi-circuit-partitioning-algorithms

Course Project - Foundations of VLSI CAD - Autumn Semester 2022 - Indian Institute of Technology Bombay

vlsi-course-note

This repo contains my notes on MR322 2022 Spring at Shanghai Jiao Tong Univ.

vlsi-design-automation

Python implementation of VLSI Design Automation as a part of EC440 VLSI CAD project.