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Pallav Purbia's Projects

booth-multiplier icon booth-multiplier

Designed and implemented a Booth multiplier using Verilog for efficient signed multiplication on Basys 3 (Artix 7) FPGA.

express icon express

Fast, unopinionated, minimalist web framework for node.

glmfit icon glmfit

Implementation of Generalized linear model fit function for Gnu Octave

mnist-octave icon mnist-octave

A single hidden layer neural network from scratch with octave

sonicsurface icon sonicsurface

Generating Airborne Ultrasonic Amplitude Patterns Using an Open Hardware Phased Array

sram icon sram

Designed and implemented a Static Random Access Memory (SRAM) module using Verilog for data storage applications on Basys 3 (Artix 7) FPGA.

verilog_vivado_codes icon verilog_vivado_codes

Collection of Verilog projects designed using Xilinx Vivado. Includes various digital logic designs like traffic light controllers and state machines. Each project features well-documented code, simulation results, and implementation details for learning and reference.

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