0xd503 Goto Github PK

0xd503

Config files for my GitHub profile.

arm-multy-cycle_processor

ARM Multi Cycle Processor Core HDL Description

arm-single-cycle-processor

ARM architecture single-cycle processor designed according to book "Digital design and computer architecture: ARM edition" as a practice in digital design.

arm_pipelined-processor

ARM armv4 pipelined CPU

autofeeder-for-fish.

Autofeeder for fish program with low power mode for ATmega328p.

avr-libraries

There is AVR libraries for different interfaces and peripherals.

data-structures_algorithms

digital-music-project

Laboratory work project

dotfiles

My personal dotfiles

geeksport

Two in one: smartwatch with Bluetooth notifications + speedometr.

generator-for-phys-lab

A simple square wave generator, based on Arduino Leonardo (ATmega32u4).

i2c-interface

I2C Interface RTL description

lynis

Lynis - Security auditing tool for Linux, macOS, and UNIX-based systems. Assists with compliance testing (HIPAA/ISO27001/PCI DSS) and system hardening. Agentless, and installation optional.

mdr1986vex_freertos-plus-tcp

FreeRTOS-Plus-TCP port for MDR1986VEx (1T/3) microcontrollers

plate-solver

Plate (astronomic) solver

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

smartlab-micex

MICEx stocks analyzer

spi-interface

SPI Interface RTL Description

str2ihex

Utility for converting files with character-coded hexadecimal numbers to the Intel HEX format files.

systemverilog-modules

Common SystemVerilog/Verilog modules

xeqt0r

xEqt0r is virtual CPU with a custom ISA (in development)