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34030

9cc

A Small C Compiler

aes

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

alterade2labs_verilog

My solutions to Alteras example labs

assembler-simulator

Simple 8-bit Assembler Simulator with Angular.js

beginners-c-program-examples

Simple, Short and Sweet beginners friendly C language programs

blinky

Example LED blinking project for your FPGA dev board of choice

bonfire-cpu

FPGA optimized RISC-V (RV32IM) implemenation

c5soc_opencl

DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.

catc

a simple tiny C Compiler using Lex & Yacc

cho

CHO is a benchmark suite for OpenCL FPGA Accelerators

core_ft60x_axi

FTDI FT600 SuperSpeed USB3.0 to AXI bus master

cpcie

CPCIe is a hardware compressor/decompressor implemented on FPGA, to compress/decompress data between Host PC and FPGA via PCIe interface.

cpcie-hotspot

Extended work from previous CPCIe's project.

datascience

This repository is a collection of work in Data Science. In theory, it covers from area of mathematics, statistics, information science and computer science. In practical, it is widely used in machine learning and other subdomains.

datasciencecoursera

datasharing

The Leek group guide to data sharing

de0-nano-bitcoin-miner

DE0 Nano port of fpgaminer - this is based on https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner

deep-neural-network-hardware-accelerator

SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK Software

deploying_cnn_on_fpga_using_opencl

Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design contest.

digital_lab

Laboratory works for digital electronics course in Kyiv Polytechnic Institute, Department of Design of Electronic Digital Equipment, Electronics faculty

dspfilters

A collection of demonstration digital filters

exdata_plotting1

Plotting Assignment 1 for Exploratory Data Analysis

fc8-compression

A simple LZ77-based compression with fast decompression on 68K and other legacy hardware

finance.zynqpricer.hls

Heston implementation for Zynq with Vivado HLS

forwardfinancialframework

F^3 is Python-based framework for valuing forward looking financial products on Heterogeneous Parallel Computing Platforms

fpga-design-task

fpga-lab

fpga-partial-reconfig

Tutorials, scripts and reference designs for the Intel FPGA partial reconfiguration (PR) design flow

fpga-pcie