RTL Design Engineer
- š± Iām currently learning about RISC-V RV32I, VLIW Processor
- š Computer Organization and Design: the Hardware/Software Interface :- David A. Patterson and John L. Hennessy
HDL
- Verilog
- System Verilog
Tools
- Vivado
- Questa Sim
- Verilator(Open-Source)
- Icarus Verilog(Open-Source)