Comments (1)
Nowhere. This is not a problem because the lock address will be either overridden by the next executed ldxp
or cleared on the context switch.
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Related Issues (20)
- Document that BOOST_ATOMIC_NO_CMPXCHG8B may be not useful for MSVC HOT 2
- atomic/detail/fence_arch_ops_gcc_arm.hpp:70:13: error: expected string literal in 'asm' HOT 1
- Cross compiling boost_1_56_0 compilation error in atomic lib HOT 3
- Boost atomics on aarch64 produce invalid instructions HOT 1
- Build failure on nios2 architecture HOT 7
- Consider removing the AARCH64 128 bit atomic implementation (LDXP+STXP loop) HOT 4
- File is missing: lock_pool_init1.ipp HOT 3
- Boost Log fails to build (MSVC, ARM64) HOT 1
- Since synchronization.lib is only added to usage-requirements... HOT 7
- _mm_set1_epi64x intrinsic workaround inaccurate for VS2015 HOT 1
- [question] risc-v support HOT 4
- UWP support HOT 3
- Boost Atomic 1.78 breaks macOS/iOS integration HOT 4
- Remove or fix relative includes HOT 1
- Documentation redirect link broken HOT 4
- Cross compilation issues on x86 to A64FX HOT 4
- Fails to build with `toolset=msvc-14.0 cxxstd=latest` HOT 1
- Cannot get boost::atomic_ref to compile using a const integer HOT 2
- is_lock_free() and is_always_lock_free not consistent. HOT 1
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from atomic.