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ariane

Ariane is a 6-stage RISC-V CPU capable of booting Linux

basejump_stl_regression

BaseJump STL Regression Infra

bsg_dramfs_mklfs

buildroot

Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.

cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

cppsaif

cpp parser for SAIF file

dramsim3

DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator

dromajo

RISC-V RV64GC emulator designed for RTL co-simulation

ee477-designs-final-project

ee477-designs-module0

ee477-designs-module1

ee477-designs-module2

ee477-designs-module3

ee477-hammer-cad

ee478-designs-project

flute

Rectilinear Steiner Minimal Tree Algorithm (Chu/Wong TCAD 2007)

freedom-u-sdk

Freedom Unleashed Software Development Kit

gapbs

GAP Benchmark Suite

gpu-bsw

hammer

HAMMER: Highly Agile Masks Made Effortlessly from RTL

hammer-bsg-plugins

hammer-cadence-plugins

Hammer plugins for Cadence tools

hardfloat

openram

An open-source static random access memory (SRAM) compiler.

opensta

OpenSTA engine

riscv-dbg

RISC-V Debug Support for our PULP RISC-V Cores

riscv-fesvr

RISC-V Frontend Server

riscv-isa-sim

Spike, a RISC-V ISA Simulator

riscv-linux

RISC-V Linux Port

riscv-ocelot

Ocelot: The Berkeley Out-of-Order Machine With V-EXT support