cabreraam Goto Github PK

boilerplate

Random files that I pull from to create scripts and Makefiles

cabreraam.github.io

Github Pages template for academic personal websites, forked from mmistakes/minimal-mistakes

cabreraam.github.io.old

Professional Page

cfu-playground

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online workshop: https://google.github.io/CFU-Playground/ For reference docs, see the link below.

dibs_opencl

OpenCL FPGA host and device code for DIBS benchmarking suite targeting the Intel HARPv2 system.

embeddedsw

Xilinx Embedded Software (embeddedsw) Development

esesc

ESESC: A Fast Multicore Simulator

flang_vscode_pres_supplement

iwocl2019_artifacts

Accompanying code and data to our IWOCL'19 paper regarding the Intel Hardware Accelerator Research Program HARP v2 (HARPv2) platform.

klayout

KLayout Main Sources

llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

llvm-test-suite

llvm-tutor

A collection of out-of-tree LLVM passes for teaching and learning

metasploit-framework

Metasploit Framework

mlir-aie

An MLIR-based toolchain for Xilinx Versal AIEngine-based devices.

mlir-hello

MLIR Sample dialect

opencv

Open Source Computer Vision Library

openlane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

openmp-tutorial

Exercises and Solutions for "Programming Your GPU with OpenMP: A Hands-On Introduction"

pythondatasciencehandbook

Jupyter Notebooks for the Python Data Science Handbook

query_opencl_info

Simple library to query OpenCL devices, with info specific to the OpenCL 1.0 spec.

riscv-simulator

simulator for riscv instruction set

rodinia_fpga

Rodinia Benchmark Suite ported for OpenCL-capable Intel FPGAs

sanitizers

Examples for using Clang and GCC sanitizers: asan, lsan, tsan, ubsan, msan

siliconcompiler

A modular build system for hardware

snap

SN Application Proxy

snbone

This application targets the primary computational solve burden of a SN, continuous finite element based transport equation solver

spack

A flexible package manager that supports multiple versions, configurations, platforms, and compilers.

vitis-in-depth-tutorial

vitis-tutorials

Vitis In-Depth Tutorials