carollee1993 Goto Github PK

bmxnet

deep-learning-processor-list

A list of chips and IPs for Deep Learning and Machine Learning, mostly industry and commercial products or projects.

doc

Documentation for NVDLA.

fashion-mnist

A MNIST-like fashion product database. Benchmark :point_right:

hw

RTL, Cmodel, and testbench for NVDLA

neural-networks-on-silicon

This is a collection of works on neural networks and neural accelerators.

nvdla.github.io

NVDLA Web Content

object-detection

Object detection project for real-time (webcam) and offline (video processing) application.

onnx

Open Neural Network Exchange

pipecnn

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

pulp-dronet

A deep learning-powered visual navigation engine to enables autonomous navigation of pocket-size quadrotor - running on PULP

pumpkin-book

《机器学习》（西瓜书）公式推导解析，在线阅读地址：https://datawhalechina.github.io/pumpkin-book

ring_network-based-multicore-

多核处理器 ;ring network , four core, shared space memory ,directory-based cache coherency

squeezedet

A tensorflow implementation for SqueezeDet, a convolutional neural network for object detection.

squeezenet

SqueezeNet: AlexNet-level accuracy with 50x fewer parameters

state-of-the-art-result-for-machine-learning-problems

This repository provides state of the art (SoTA) results for all machine learning problems. We do our best to keep this repository up to date. If you do find a problem's SoTA result is out of date or missing, please raise this as an issue or submit Google form (with this information: research paper name, dataset, metric, source code and year). We will fix it immediately.

tensorrt

TensorRT is a C++ library that facilitates high performance inference on NVIDIA GPUs and deep learning accelerators.

tiny-imagenet-200

My personal research code started in July 2017, focusing on analysis of Convolutional Neural Networks. Starting with a thorough exploration of Stanford's Tiny-Imagenet-200 dataset.

ultra_net

FPGA-based neural network inference project for 2020 DAC System Design Contest

vmls.jl

wujian100_open

IC design and development should be faster，simpler and more reliable

xnornet4fpga

XNOR-Net inference on low-power IGLOO FPGA using Chisel