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CensoredUsername avatar CensoredUsername commented on May 28, 2024 1

Dynasm actually does support short jumps. In x86 mode you can use 8-bit PC-rel, 16 bit PC-rel and 32-bit absolute jumps. In x64 mode you can use 8-bit PC-rel and 32-bit PC-rel jumps (no 16-bit rel as Intel doesn't support those for some reason. AMD does support them).

However the assembler architecture requires that the user indicates the wanted size. e.g. jmp BYTE >label. This is due to dynasm being a single-pass assembler, which means that the size of the instructions must be known when they are evaluated the first time, and later emitted relocations will not be able to change the size of instructions previously emitted. If this wasn't the case offsets to instructions would shift around as the actual label definitions happen.

So branch relaxation is possible, but the user of the library is responsible for implementing it. Next to that the benefits of it aren't that big (especially in x64 mode where all immediate jumps are relative). An argument could be made about instruction cache but if you're optimizing to that extent a single-pass assembler is probably not what you want.

from dynasm-rs.

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