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视频旋转（2019FPGA大赛）

ac97

AC 97 Controller IP Core

ae-pcie-dma

way to use xapp1052 with old version of PCIe IP core

axi_digital_median_filter_ip

An image filter IP core based on Xilinx ZYNQ SOC, Using hardware 3x3 median filter to eliminate image salt-and-pepper noise without CPU involvement. AXI4-stream interface. MIT License

chisel-lenet

cnn_open

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

comm

IP cores for communication systems

cores

Various HDL (Verilog) IP Cores

cpu-rsicv

daisho

Test of the USB3 IP Core from Daisho on a Xilinx device

digilent-xdc

A collection of Master XDC files for Digilent FPGA and Zynq boards.

e200_opensource

The Ultra-Low Power RISC Core

ethernet-fmc-zynq-gem

Example design for the Ethernet FMC using the hard GEMs of the Zynq

fft_ip_core

Fast Fourier Transform v9.0

fifo_ip_core

use FIFO and uart

fp23fftk

Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).

fpga-accelerator-for-aes-lenet-vgg16

FPGA/AES/LeNet/VGG16

fpga-cpu-ip-core-verilog-programming

FPGA Module Mini Project Designing and Implementation of a CPU IP core with Harvard architecture using Verilog and Cyclone V Altera FPGA board , implementing the state machine of the control unit (Fetch -decode -Execute) , Memory model (Code memory and data memory ) , Assembler , I/O units (PS2 Keyboard and Graphics LCD )

fpga-zynq

Support for Rocket Chip on Zynq FPGAs

fpgadisplay-ipcore

FPGA VGA Display Handler - IP Core Repository

gng

Gaussian noise generator Verilog IP core

gost28147-89

GOST 28147-89 IP Core (ecb, ecb pipeline, cfb, mac)

gpio

GPIO IP core from opencores.

i2c-demo

A open core ip and some DIY

ip-cores

Yuno Chen FPGA/ASIC IP cores

ip-cores-1

⚙️ IP Cores for Xilinx FPGA Devices

ip_repo

Repository for Xilinx Vivado IP cores

ipcore

lenet-on-zynq

Simulating implement of LeNet network on Zynq-7020 FPGA

lenet5