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artys7

Where Arty S7 projects are kept. MIT License unless file headers state otherwise.

artys7-rpu-soc

Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.

benchpower1

Schematics, Firmware & Simulations for a simple linear Bench Power Supply

minispartan3

Projects for the miniSpartan3 board from Scarab Hardware

misc

General things not associated with a particular project.

riscv-compliance

rpu

Basic RISC-V CPU implementation in VHDL.

sddatalogger1

A 4-channel analog SD Card datalogger with RTC

teensyz80

Code and related parts of the TeensyZ80 project.

tpu

TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. Designed to run on miniSpartan6+.

uart

Simple UART implementation in VHDL