LiuDD's Projects
This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.
该项目依据全国大学生集成电路创新创业大赛“ARM杯”赛题要求,在FPGA上搭建Cortex-M3软核、图像协处理器,并通过OV5640摄像头采集车牌图像,实现对车牌的识别与结果显示。项目基于Altera DE1 FPGA搭载Cortex-M3软核,依据AHB-Lite总线协议,将LCD1602、RAM、图像协处理器等外设挂载至Cortex-M3。视频采集端,设计写FiFo模块、SDRAM存储与输出、读FiFo模块、灰度处理模块、二值化、VGA显示等模块。最终将400位宽的结果数据(对应20张车牌)存储在RAM中,输出至AHB总线,由Cortex-M3调用并显示识别结果。
ieee sensors journal matlab codes (updating...)
32-bit Superscalar RISC-V CPU
这儿为你准备了众多免费好用的ChatGPT镜像站点,当前100+站点
Data Science Using Python
A project for self-implementation of deep learning on FPGAs
Config files for my GitHub profile.
synthesizable FFT IP block for FPGA designs
64b FFT IP in verilog for FPGA
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目
internship
Accelerated Image Reconstruction using Generative Adversarial Networks on Cloud FPGAs
Human Activity Recognition example using TensorFlow on smartphone sensors dataset and an LSTM RNN. Classifying the type of movement amongst six activity categories - Guillaume Chevalier
Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project
ieee sensors journal References
MATLAB code of GPSR_BB_BCS and simulation data
Implement Tiny YOLO v3 on ZYNQ
Simulation done for TGRS paper: Design of New Wavelet Packets Adapted to High-Resolution SAR Images with an Application to Target Detection
Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA
A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard
HLS_YOLOV3
YOLOv5 🚀 in PyTorch > ONNX > CoreML > TFLite
YOLOX is a high-performance anchor-free YOLO, exceeding yolov3~v5 with MegEngine, ONNX, TensorRT, ncnn, and OpenVINO supported. Documentation: https://yolox.readthedocs.io/
FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)