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bare-hugo-theme

A Hugo theme based on Bulma.io

dtd

elide

Embedded Logic Integrated Design Environment

ghdl

VHDL 87/93/2002/2008 simulator

ghdl-packaging

Sources for package management systems to build GHDL

ghdl-rpm

ghdl-yosys-plugin

VHDL synthesis (based on ghdl)

hwd-ide

icemulti

Dynamic reconfiguration in iCE40 FPGAs

json-for-vhdl

A JSON library implemented in VHDL.

login-action

:octocat: GitHub Action to login against a Docker registry

pactoys

A set of pacman packaging utilities.

psl_with_ghdl

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

spinalhdl

SpinalHDL core

tip

GitHub Action to keep a 'tip' pre-release always up-to-date

tox

Command line driven CI frontend and development task automation tool

vexriscv

A FPGA friendly 32 bit RISC-V CPU implementation

vexriscvsocsoftware

vhdl-cfg

Playground to explore and compare how configuration is handled by different tools for development of VHDL projects

vunit

VUnit is a unit testing framework for VHDL/SystemVerilog

weview

A cross platform waveform viewer, based on Javascript and its technology, capable to display (e)VCD, WLF and LXT(2) waveform formats