DMAReader not working after update to 2023.12 about litepcie HOT 8 CLOSED

Tried reverting to 5e3383c (which is the last commit before the "cleanup") and this works as expected.

So definitely something got broken ...

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Checked 76c7381ad8d7eab01020fd9bbe0249166535f2a8 and it fails (it's the merge commit of the "cleanup").

I'm looking at the phy req_sink and what's sent seems similar in both cases, but what comes back is not :/

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dumps.zip

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For some reason the straddle option is turned on in uspciephy.py and usppciephy.py but the conversion logic doesn't support that mode of operation at all ...

 "AXISTEN_IF_RC_STRADDLE"       : True,

Turning that off fixes my issue.

I'm not sure how it works for anyone with that enabled ...

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My bad ... this fix is not complete. It's one problem but 526a3d05aafcf8877b7cb9f893de82f3bd85a6e4 also breaks it ...

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I think that commit hasn't been tested when address_width == 32.
Or when on zynq mp ( device ID == xczu )

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xczu is maybe missing here:

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Yes, it is.

But that alone doesn't solve the problem.
If I set address_width = 64 (and add xczu), then it works.
But in 32 bit mode it doesn't. The address ends up wrong on what's sent to the core ( upper and lower 32 bits are swapped ).

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