Comments (6)
maxime-esa
commented on July 30, 2024
The entry and exit procedure are optional.
Your model misses the state definitions. As it is now it only has "NEXTSTATE"s.
There is a shortcut in SDL that makes the NEXTSTATE be also a STATE definition if you put something below it (like an INPUT or a CONNECT).
If you only have this on the diagram:
it is not sufficient. It means you enter this state, but you haven't defined any behaviour when you are in this state (even if it's a nested state).
If you have no way to exit the state, just add a floating state with the same name on the diagram to define it:
However, in your case this state can be exited:
So you should connect these exit and define a transition leading to another state (or exit this other nesting state):
(In that case you don't need a floating state with no content, the state is properly defined).
Do the same for your LEOP state.
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SerenaC94
commented on July 30, 2024
Ok I think I got it now. Just one thing: if I want to connect two states do I need to use the "ContinuousSignal" button?
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maxime-esa
commented on July 30, 2024
To connect the "exit" of a substate with a transition in the superstate (i.e. the error exit in your model) you must use the Connect symbol:
This is different from the Continuous signal, which is a spontaneous transition based on a boolean expression.
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SerenaC94
commented on July 30, 2024
Ok, so something like this:
system OBCmain;
/* CIF TEXT (159, 221), (287, 203) */
-- Text area for declarations and comments
use dv comment 'dataview-uniq.asn';
--use dv2 comment 'dataview2.asn';
signal test_voltage(MyInteger);
signal status_string(MyString);
/* CIF ENDTEXT */
channel c
from env to OBCmain with test_voltage;
from OBCmain to env with status_string;
endchannel;
block OBCmain;
signalroute r
from env to OBCmain with test_voltage;
from OBCmain to env with status_string;
connect c and r;
/* CIF PROCESS (225, 49), (150, 75) */
process OBCmain;
state LEOP;
substructure
out (error);
state BOOT;
substructure
out (error,error);
/* CIF TEXT (15, 42), (287, 143) */
-- Text area for declarations and comments
dcl V MyInteger :=0;
/* CIF ENDTEXT */
/* CIF START (384, 62), (70, 35) */
START;
/* CIF NEXTSTATE (365, 117), (107, 35) */
NEXTSTATE check_voltage;
/* CIF state (1580, 73), (101, 35) */
state check_other
/* CIF comment (1701, 73), (194, 35) */
comment 'Go on from here for nominal';
endstate;
/* CIF state (774, 68), (114, 35) */
state check_voltage;
/* CIF input (735, 136), (192, 39) */
input test_voltage(V)
/* CIF comment (947, 138), (328, 35) */
comment 'Read signal test_voltage coming from the outside';
/* CIF decision (796, 195), (70, 36) */
decision V;
/* CIF ANSWER (616, 255), (70, 24) */
(>5):
/* CIF output (579, 299), (143, 35) */
output status_string('high');
/* CIF return (633, 354), (35, 35) */
return error;
/* CIF ANSWER (868, 255), (47, 24) */
(<2):
/* CIF output (823, 299), (137, 35) */
output status_string('low');
/* CIF return (874, 354), (35, 35) */
return error;
/* CIF ANSWER (1008, 255), (70, 24) */
ELSE:
/* CIF output (971, 299), (143, 35) */
output status_string('ok')
/* CIF comment (1127, 299), (182, 35) */
comment 'Send signal to the outside';
/* CIF NEXTSTATE (992, 349), (101, 35) */
NEXTSTATE check_other
/* CIF comment (1106, 349), (432, 40) */
comment 'The voltage is within an acceptable range, move to the next check
Otherwise: exit BOOT';
enddecision;
endstate;
endsubstructure;
/* CIF START (762, 254), (70, 35) */
START;
/* CIF NEXTSTATE (764, 304), (66, 35) */
NEXTSTATE BOOT
/* CIF comment (850, 304), (337, 35) */
comment 'Nested state: double-click to enter the FSM for BOOT';
/* CIF state (1092, 636), (70, 35) */
state DTMB
/* CIF comment (1182, 636), (555, 35) */
comment 'Dummy state to enforce correctness, it will be removed when we define the FSM for DTMB';
endstate;
/* CIF state (764, 304), (66, 35) */
state BOOT
/* CIF comment (850, 304), (337, 35) */
comment 'Nested state: double-click to enter the FSM for BOOT';
/* CIF connect (936, 359), (70, 35) */
connect error;
/* CIF return (953, 414), (35, 35) */
return error;
/* CIF provided (1055, 372), (70, 35) */
provided auto
/* CIF comment (1145, 372), (231, 35) */
comment 'This transition needs to be defined!';
/* CIF NEXTSTATE (1055, 422), (70, 35) */
NEXTSTATE DTMB
/* CIF comment (1145, 422), (148, 40) */
comment 'Everything went fine
Otherwise: exit LEOP';
endstate;
endsubstructure;
/* CIF START (493, 228), (70, 35) */
START
/* CIF comment (583, 228), (177, 35) */
comment 'This is the starting state';
/* CIF NEXTSTATE (493, 308), (70, 35) */
NEXTSTATE LEOP
/* CIF comment (583, 308), (390, 35) */
comment 'Nested state: double-click to enter the states composing LEOP';
/* CIF state (793, 141), (73, 35) */
state COMMIS
/* CIF comment (888, 141), (570, 35) */
comment 'Dummy state to enforce correctness, it will be removed when we define the FSM for COMMIS';
endstate;
/* CIF state (795, 84), (70, 35) */
state FDIR
/* CIF comment (885, 84), (555, 35) */
comment 'Dummy state to enforce correctness, it will be removed when we define the FSM for FDIR';
endstate;
/* CIF state (493, 308), (70, 35) */
state LEOP
/* CIF comment (583, 308), (390, 35) */
comment 'Nested state: double-click to enter the states composing LEOP';
/* CIF connect (362, 368), (70, 35) */
connect error;
/* CIF NEXTSTATE (362, 427), (70, 35) */
NEXTSTATE FDIR;
/* CIF provided (648, 380), (70, 35) */
provided auto
/* CIF comment (738, 380), (231, 35) */
comment 'This transition needs to be defined!';
/* CIF NEXTSTATE (646, 433), (73, 35) */
NEXTSTATE COMMIS;
endstate;
endprocess OBCmain;
endblock;
endsystem;
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maxime-esa
commented on July 30, 2024
Yes, that looks correct
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SerenaC94
commented on July 30, 2024
Thanks again!
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