Enhancing NXDN (and maybe others) sync pattern detection about dsdcc HOT 4 CLOSED

On my side the 1 bit error tolerance on the NXDN sync pattern really improve the frame detection. Try it on your side if you want !

G4LX tolerate more errors on his MMDVM firmware (3 errors bits if I read correctly the code).

But as you said the FSW is really short in NXDN, so this improvement also introduce false positive frame detection, I tried to fix it with a good LICH detection but the only 1 parity bit is really short to check if the frame type is correct...

I think adding a frame storage buffer with a high level FSW bits counter/analyzer could reduce false positive detection, I'm studying this option on my side.

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@LouisErigHerve Maybe you could help out on the other issue we are having ? Well i am not really having it I am just the guy witht he equipment to test but....f4exb/sdrangel#574

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Comparing at each new symbols the n previous symbols with each different sync sequence by looping each time on these previous symbols is not efficient. The DSDSymbol class should accumulate the symbol differences against each sync sequence at each new symbol.

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Implemented in v1.9.0

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