Comments (1)
@grebe I don't but I have played around with them a little bit so I'm not starting from scratch.
Is there any code I can look at before I try and answer
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Related Issues (20)
- PeekPokeTester Type inference HOT 1
- Support CXXFLAGS, LDFLAGS environment variables
- Supporting ZIO fibers HOT 8
- [BUG] verilator: 0-width signals in Decoupled Bundle lead to incorrect peek HOT 4
- firrtl backend with ChiselFlatSpec assert fails weirdly HOT 1
- verilator poke incorrect signal for 0-width RRArbiter HOT 7
- have plan to port UVM into chisel test
- should work with verilator *** FAILED ***
- Can't poke MixedVec HOT 6
- poke io as different format using bundle in PeekPokeTester HOT 1
- Peek/Poke/Step/Expect messages not displayed HOT 7
- firrtl vs. verilator behave different HOT 6
- Make Treadle the Default Backend HOT 2
- Clock is initialized at 1 instead of 0 HOT 1
- g++ compile error while adding --trace-fst to verilator options
- [Question] How to use of tester2 (installation) HOT 1
- Inconsistence between VCD and log
- Removed `io` in Module cause compilation error HOT 2
- java.lang.VerifyError
- Converting Uint32 signal output to BigInt
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