Quad instructions throw exceptions about aarch64-bare-metal-qemu HOT 4 OPEN

The exception class EC == 0b000111 in ESR means Access to SME, SVE, Advanced SIMD or floating-point functionality trapped by CPACR_EL1.FPEN, CPTR_EL2.FPEN, CPTR_EL2.TFP, or CPTR_EL3.TFP control..

In other words, the Advanced SIMD and VFP extensions which are not enabled.

A possible workaround is to ask the compiler not to use these instructions via -mgeneral-regs-only.

The solution is to enable them via the FPEN bit 31:20 in the CPACR_EL1 register.

  mrs    x1, cpacr_el1
  mov    x0, #(3 << 20)
  orr    x0, x1, x0
  msr    cpacr_el1, x0

from aarch64-bare-metal-qemu.

For completeness, I used the aarch64-none-elf toolchain provided by Arm, version 11.2-2022.02:

• https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/downloads

from aarch64-bare-metal-qemu.

The exception class EC == 0b000111 in ESR means Access to SME, SVE, Advanced SIMD or floating-point functionality trapped by CPACR_EL1.FPEN, CPTR_EL2.FPEN, CPTR_EL2.TFP, or CPTR_EL3.TFP control..

In other words, the Advanced SIMD and VFP extensions which are not enabled.

A possible workaround is to ask the compiler not to use these instructions via -mgeneral-regs-only.

The solution is to enable them via the FPEN bit 31:20 in the CPACR_EL1 register.

  mrs    x1, cpacr_el1
  mov    x0, #(3 << 20)
  orr    x0, x1, x0
  msr    cpacr_el1, x0

Thanks. Another way I can think of is to handle the exception by implementing an exception handler (changing the vector table, adding handling code, etc).

from aarch64-bare-metal-qemu.

Another way I can think of is to handle the exception

If you know how to do it, yes, but I guess it is not easy, plus that it adds some run-time overhead, the exception will trigger for each quad instruction, and in printf() there are a lot.

Enabling SMD during startup is much simpler.

Also to be noted that -mgeneral-regs-only is effective only for the application code, the printf() in the library still makes use of quad instructions and crashes.

from aarch64-bare-metal-qemu.