Comments (3)
Hi @aneels3,
The current implementation throws an exception on randomization failure, so instead of if/else for detecting an error you should use try/catch. I realize that the use of exceptions is different than SystemVerilog, but would like to understand if it presents other use-model challenges.
Thanks,
Matthew
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Hi @mballance
I was trying to implement the
assert(instance.randomize());
In this case I am assuming the assertions are turn on.
When assertion are turn off we can achieve the same with if else
but as per your suggestion we can achieve this by try except block as well.
May be we can implement this when we have support for assertion in PyVSC.
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Hi @aneels3,
There's another issue that will likely prevent us from ever having randomize return a boolean: the randomize_with pattern used by PyVSC doesn't allow us to return a value to the user. An exception is the only way to signal that something has gone wrong. For consistency, randomize() should behave the same.
Best Regards,
Matthew
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