Comments (2)
Hi @davidmlw,
The short answer is "No". PyVSC provides data randomization and functional coverage collection, with similar constructs to SystemVerilog. PyVSC is a good choice if you use a Python-based simulation testbench methodology (eg cocotb, pyuvm) and want to do constrained randomization and collect functional coverage.
PSS is a language that targets modeling and generation of system-level tests -- for example, bare-metal software-driven tests for SoC-integration testing
PSS also has data randomization and functional coverage collection, but adds on top:
- Actor Model-style capture of scenarios that incorporate constraints over time
- Language constructs for modeling system-level resource contention and dataflow
- Language constructs for modeling multi-core scenarios
- A well-defined path to create efficient software-driven tests
I recently wrote a few blog posts as an introduction to some of the core features and capabilities of the PSS language. If you're interested, please have a read:
Automating Bare-Metal Tests with PSS
PSS Fundamentals: Actions, Components, and Test Generation
Declarative Programming and Multi-Core Tests
Relating Actions with Dataflow
Modeling DMA Test Scenarios with PSS
PSS Memory Management Fundamentals
PSS Concurrency and Resources
Interacting with Devices via PSS Registers
Relating Actions with Dataflow Part2 -- Parallelism
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Many thanks. Very good blogs!
What is the status and acceptence of cocotb, pyuvm and pyvsc? I see a big opportunity for python in verification, and I think they perfectly fit the verification tasks without legacy VIP dependencies.
What would you suggest if adopt cocotb, pyuvm and pyvsc in production?
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