hbdeng Goto Github PK
Type: User
hbdeng's Projects
basic-scanning-tunneling-microscope
A basic scanning tunneling microscope, low cost
doxverilog
Eric's branch of Doxverilog (doxygen + doxverilog patch)
freemodbus_verilog
Verilog implementation for FreeModbus|Free Modbus的Verilog实现(working)
gwyddion
svn://svn.code.sf.net/p/gwyddion/code/trunk/gwyddion
online_fpga_configure_downloader_for_epcs_verilog
An online configure downloader of SPI flash for FPGA during working|在FPGA工作的时候，通过通讯协议，用FPGA的配置管脚模拟SPI协议来完成Flash内容的更新。需要FPGA芯片支持
pycroscopy
Scientific analysis of nanoscale materials imaging data
spmcontroller
Universal Scanning Probe Microscope (SPM) Controller with PyQt, QtCreator, Python. There can be two channels in display.
usb-blaster-gcc
Port of https://github.com/eleqian/WiDSO/tree/master/MCU/USB-Blaster to GCC and "traditional" STM32F103C8T6 Bluepill board.
verilog2c_script_for_doxgen
A small script for JavaDoc style Verilog project to be converted to C files.
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