janeann Goto Github PK
Name: janeann
Type: User
Name: janeann
Type: User
This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.
Code repositoy for "AOWS: Adaptive and optimal network width search with latency constraints", CVPR 2020
paper abstract spider
PyTorch implementation of "Contrast to Divide: self-supervised pre-training for learning with noisy labels"
CNN-Accelerator based on FPGA developed by verilog HDL.
Code examples in pyTorch and Tensorflow for CS230
Differentiable architecture search for convolutional and recurrent networks
吴恩达-深度学习-课后作业-答案与总结
[ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures
[ICML 2021] "Double-Win Quant: Aggressively Winning Robustness of Quantized DeepNeural Networks via Random Precision Training and Inference" by Yonggan Fu, Qixuan Yu, Meng Li, Vikas Chandra, Yingyan Lin
using xilinx xc6slx45 to implement mnist net
Mobile vision models and code
Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎)
Object detection and instance segmentation toolkit based on PaddlePaddle.
PC-DARTS:Partial Channel Connections for Memory-Efficient Differentiable Architecture Search
stm32 pid
CNN_FPGA_acclerator
[ICLR 2019] ProxylessNAS: Direct Neural Architecture Search on Target Task and Hardware
achieve softmax in PYNQ with heterogeneous computing.
Proper implementation of ResNet-s for CIFAR10/100 in pytorch that matches description of the original paper.
Semi-supervised models based on deep neural networks implemented in PyTorch.
RTL implementation of Flex-DPE.
Single Path One-Shot NAS MXNet implementation with full training and searching pipeline. Support both Block and Channel Selection. Searched models better than the original paper are provided.
仓库jjj
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