PACKAGE IP about zynq-nvdla HOT 3 CLOSED

This issue was caused by abnormal ports’ name because when you packaged ip in some version of Vivado Suite it will detect if the signals of axi bus is aligned, and this was fixed, please pull the latest branch.

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• To fix this
  1. pull lastest image from dokcer
  2. download from github-page

When I try to method 2, I find out some missing information .

There is no error to open package IP.

but

how to set IPs ? I believe that I need two IPs

1. Master

   • name: nvdal_core2dbb_ar

2. Slave

• name : interface_apb
  Like this

set Name and Mode

but how to set Port Mapping / Parameters .

( JUST make new project
ADD RTL from github download RTL folder
Use. tools -> Create and Package New IP )

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hello, I also use zcu102 board ,but I don't know how to make block design ,can you share your block design? Thank you!

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