Comments (5)
I'm probably missing something here, but isn't this the same thing as what's already being tested here:
Line 40 in 8c3d96d
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The problem with this is that we parse this, but discard the name, so circt-opt doesn't print %w
if you round trip it. We should instead recognize the name, store it in the IR as a 'name' attribute on the wire, then print the name attribute back out.
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Hi, I created PR #146 for this :)
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I want to contribute in this ,please guide me as i am new in this organization.
from circt.
@uenoku fixed this some time ago, thanks!
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Related Issues (20)
- [LLHD] Empty llhd.proc assertion failure HOT 1
- [FIRRTL] Lint XMRs in the "Design"
- [CI] LLVM Rebuild configuration suddenly broken? HOT 2
- [Arc] Add basic assertion support HOT 15
- [FIRRTL] Add back owning module constraint for local targets after removing use of ExtractInstances
- [HGLDD] Emit HW struct and array types
- Wiring problem error with const source and non-const sink w/no-ref-type option
- [FIRRTL][CheckCombLoops] Missing RWProbeOp support, crashes HOT 1
- [FIRRTL] LowerMemory change in #6719 leads to ambiguous targets in EmitOMIR HOT 3
- [Comb] Missed optimization opportunity for multiply used boolean operations
- [SV] SVExtractTestCode not Extracting Assert Properties
- [OM] parsing depend on the ordering of Class HOT 5
- [firrtl] extmodules with HasBlackBoxInline instantiated only in a layer not emitted into layers location
- [SMT] Add quantifier attribute and pattern support to ExportSMTLIB HOT 1
- [FIRRTL] Not generate "automatic logic" in the output SystemVerilog file HOT 2
- [FIRRTL] ‘firtool’ crashes with an error when receives a ‘fir’ file with no main module HOT 3
- [FIRRTL][InferWidths] When there is no unique minimal solution for width constraints, what should be the width? HOT 9
- Looking for circt==1.48.1.dev34 HOT 1
- [FIRRTL] isX lowering doesn't work for bundles HOT 2
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