Comments (4)
Also, the permute operations should maybe be looked at and all clarified as part of this as well.
from safe_arch.
Format Proposal
swiz_{inputs}_{lane-size}_{source}_{data-type}
- The inputs are
a
,b
, and/ori
- The lane sizes are
f32
,f64
,iX
, and possibly with az
at the end if you can zero any lane source. - The sources are "all" for "pick from all lanes", or "half" for "each half picks to just that half", optionally with h64 and l64 for higher 64 bits or lower 64 bits.
- the data types are the normal SIMD types
- The inputs are
So here's each C intrinsic and the name it would have under this scheme:
C Name | safe_arch Name |
---|---|
_mm_permutevar_ps | swiz_ab_f32_all_m128 |
_mm256_permutevar_ps | swiz_ab_f32_half_m256 |
_mm_permutevar_pd | swiz_ab_f64_all_m128d |
_mm256_permutevar_pd | swiz_ab_f64_half_m256d |
_mm256_permutevar8x32_ps | swiz_ab_i32_all_m256 |
_mm256_permutevar8x32_epi32 | swiz_ab_i32_all_m256i |
_mm_shuffle_epi8 | swiz_ab_i8_all_m128i |
_mm256_shuffle_epi8 | swiz_ab_i8_half_m256i |
_mm256_permute2f128_ps | swiz_abi_f128z_all_m256 |
_mm256_permute2f128_pd | swiz_abi_f128z_all_m256d |
_mm256_permute2f128_si256 | swiz_abi_f128z_all_m256i |
_mm256_permute2x128_si256 | swiz_abi_i128z_all_m256i |
_mm_shuffle_ps | swiz_abi_f32_all_m128 |
_mm256_shuffle_ps | swiz_abi_f32_half_m256 |
_mm_shuffle_pd | swiz_abi_f64_all_m128d |
_mm256_shuffle_pd | swiz_abi_f64_half_m256d |
_mm_permute_ps | swiz_ai_f32_all_m128 |
_mm_shuffle_epi32 | swiz_ai_f32_all_m128i |
_mm256_permute_ps | swiz_ai_f32_half_m256 |
_mm_permute_pd | swiz_ai_f64_all_m128d |
_mm256_permute4x64_pd | swiz_ai_f64_all_m256d |
_mm256_permute_pd | swiz_ai_f64_half_m256d |
_mm_shufflehi_epi16 | swiz_ai_i16_h64all_m128i |
_mm256_shufflehi_epi16 | swiz_ai_i16_h64half_m256i |
_mm_shufflelo_epi16 | swiz_ai_i16_l64all_m128i |
_mm256_shufflelo_epi16 | swiz_ai_i16_l64half_m256i |
_mm256_shuffle_epi32 | swiz_ai_i32_half_m256i |
_mm256_permute4x64_epi64 | swiz_ai_i64_all_m256i |
from safe_arch.
Oh, also, we're using swiz
for "swizzle" because sometimes Intel calls it "shuffle" and sometimes it calls it "permute" and there's seemingly no logic to why one or the other is used for each particular op/intrinsic:
- It's not based on the number of inputs
- It's not based on if the inputs are immediate or not
- It's not based on the minimum CPUID
- It's not based on the destination register also being an input register or not
So we'll simply forsake both names and then pick a third name that doesn't have any existing baggage.
from safe_arch.
Oh dag we also have to consider that some b
values are the varying pattern and some b
values are the 2nd register to mix in.
from safe_arch.
Related Issues (20)
- check all integer multiplies
- License questions HOT 2
- Missing 256-bit vpermps ? HOT 2
- Naming convention cleanup HOT 1
- How would you feel about macrofying more of the implementation? HOT 4
- Publish version of new crate HOT 1
- please tag release v0.7.0 HOT 3
- source contains backup files
- Is `safe_arch` actually any safer then `core::arch`? HOT 4
- rename: andnot to bitandnot
- [neon] General ARM/Neon tracking issue.
- Put an entry for `blend` into the naming conventions document
- Some macros continue to not prefix the value constructor used with `$crate::`
- Improve CI
- macro blend_i32_m128i should have name with `imm` in it
- `cmp_ordinary` should be named `cmp_ordered`
- move_mask_m256i should be move_mask_i8_m256i
- convert most macro_rules to min-const-generics HOT 1
- ARM Support? HOT 4
- Compîlation failed in amd64 on copr HOT 1
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from safe_arch.