Comments (1)
The duty-cycle management algorithm is believed to be correctly implemented as we have run several verification over time without seeing it break the ETSI rules.
This topic has been discussed several times in the past. Please refer to other open issues or discussions about the details.
We have moved your original Issue to the Discussions tab as there is no evidence yet that there is an issue.
I am closing this newly re-created issue as a discussion can take place under #1563 before deciding if there is an issue or not.
In the future it would be nice if you could post this kind of questions on the project Discussions tab. It is a better place to engage discussions and then we can agree if it is an issue or not.
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Related Issues (20)
- TX Timeout hardcoded HOT 1
- DL not received in Class C AS923-1 + Freq 923.600
- Pre-certification should always failed due to duty-cycle limitation HOT 2
- Stack writes to NVM while radio is transmitting
- TimerInit called multiple times on the same TimerEvent_t struct HOT 1
- Race condition in RtcGetCalendarValue on NucleoL476 board
- LORAMAC_TX_CONFIG tested, but never set.
- GpioMcuRemoveInterrupt sets GPIO pull-up/pull-down registers to random uninitialized memory
- Secure-Element Preprocessor definition ifndef wrapping HOT 1
- AES function rename due to multiple definitions linking error
- LmHandlerInit causing some current leakage till the first tx HOT 3
- The correct value of MinRxSymbols? HOT 1
- does any body port this project for stm32f103?
- Does the Firmware Management (Port 203) is supported by LoRaMac-Node ? HOT 2
- Errata 2.3 current implementation may impact TX configuration
- MacBook M1 chip complies fail! arm-none-eabi-gcc: error: unrecognized command-line option '-arch'; did you mean '-march='?
- Support for MSPM0 Microcontroller
- stm32系列的Unique Devices IDs register错误
- Radio.Sleep() may leave antenna switch powered HOT 1
- Check the fragcounter in donwlink FragDecoderProcess
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