4x2 vs 5x2 SWD/JTAG debug header about imxrt1020-module HOT 3 CLOSED

Hi Martin,
thanks for responding. I see your motivation, but I strongly would recommend to use the standard header as that way nobody will need an adapter cable and can use the standard debug probes with it. Additionally, I recommend to have SWO routed to the header too, see https://mcuoneclipse.com/2016/10/17/tutorial-using-single-wire-output-swo-with-arm-cortex-m-and-eclipse/.

from imxrt1020-module.

Exactly that ... is for save space and maintain pin-headers in 0.1 '' of spacing.
If you see... the pin distribution of jtag header is not standard (and the 5pin cortex-m debug connector is an 0.05” micro header)
The intention of deviating from the standard is to be able to access those pins like in the main gpio connector.

The 5pin 0.05'' spaced header is more convenient for place&route but not for prototyping.

What you think? Is it better to follow the standard or have more convenient pins for prototyping?

from imxrt1020-module.

He Erich, I change the J47 (JTAG) to 0.05'' cortex-m debug connector and populate a pinheader with 0.1'' for non compliance jtags (more friendly to hand-wire to debuger)

In the side of SWO pin, this is complicate change. The pin is shared with ENET_CRS_DV (pin 97, GPIO_AD_B0_11) and cannot route to pinheader without signal degradation.

Maybe I need to do some simulations with hyperlynx software (I actually have to borrow the software from a friend 😉) for estimate the impact in CRS_DV signal (in some cases this is slow but some marks this signal have the same speed of ENET_CLK in chip)

For the moment, I'm closing this issue. Please open a new issue refer to SWO population 👍

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