ntp17 Goto Github PK
Name: Phu Nguyen-Truong
Type: User
Bio: Just a mediocre who likes to visualize everything.
Location: Go Vap, Ho Chi Minh City, Viet Nam
Blog: https://www.youtube.com/channel/UCSopxM1lfXuB3cgAPaOe_KQ
Phu Nguyen-Truong's Projects
aes_comb_sv
Clock-less implementation of Advanced Encryption Standard (AES) using SystemVerilog
ai-wb2_series
Software Development Kit for Ai-Thinker's Ai-WB2 modules.
akvp_x09
My take on HCMUT's Department of Electronics' 9-bit processor.
async_fifo
My design of a hardware asynchronous FIFO.
codes_for_makeredu.vn
Codes for MakerEDU.vn's products
fingerdoorlock
AVR-based Door Lock using Fingerprint
hcmut_dd_lab
My attempts at all assignments from HCMUT's Digital Design Laboratory course (EE2420) this year (K20)
huge_matrix_multiplier
My attempt to design a hardware matrix multiplier (using SystemVerilog) that multiplies very large matrices together, with as low clock cycles and as high clock speed as possible.
mat_mul_2x2_qsys
not-so-mini_project
One of the achievements in university that I am proud of.
pipeline
An upgrade from my previous single cycle RV32I design into a 5-stage pipeline.
shake256_sv
Hardware (SystemVerilog) implementation of the SHAKE256, published in FIPS 202 by NIST.
sin_cos_tan_qsys
singlecycle
My implementation of the RV32I core, along with some extensions to fit on Terasic's DE2 FPGA board.
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