nvr98 Goto Github PK

16bit-risc-processor-design

The Goal of this project is to design an 16-bit RISC Processor which is capable of handling programs like the Fibonacci number calculator. The Designed processor is then implemented in a Spartan-6 FPGA. The input from the switches (in binary) will be used to find the nth Fibonacci Number, which is displayed in the 7-segments/LED's.

32-verilog-mini-projects

verilog utils

ahb-to-apb-bridge

The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equivalent transfers on the APB.

ahb2apb-protocol-bridge

The AHB to APB Bridge is an AHB slave, providing an interface between the high-speed AHB and the low-power APB. Read and Write transfers on the AHB are converted into equivalent Transfers on the APB

arssr

[IEEE J-BHI] An Arbitrary Scale Super-Resolution Approach for 3D MR Images using Implicit Neural Representation

async-fifo

Asynchronous FIFO for transferring data between two asynchronous clock domains

cnn-fpga

Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database

convolutional-neural-network

Implementation of CNN using Verilog

deep-learning-papers-reading-roadmap

Deep Learning papers reading roadmap for anyone who are eager to learn this amazing tech!

demo2

friedricelab

Official repository of the Fried Rice Lab, including code resources of the following our works: ESWT [arXiv], etc. This repository also implements many useful features and out-of-the-box image restoration models.

geosr

image-classification-using-cnn-on-fpga

Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.

lpr-rsr-ext

machine_learning_study

mvcdemo

neural-networks-on-silicon

This is a collection of works on neural networks and neural accelerators.

neuralnetwork

pdpu

PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications

rdst

Official implementation of RDST. A residual dense swin transformer for medical image super-resolution

vitality

ViTALiTy (HPCA'23) Code Repository