Comments (4)
This would require a new backend module for Libero similar to the ISE and Quartus files here https://github.com/olofk/fusesoc/tree/master/fusesoc/build
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But what cores need to be custom for the ProASIC? I think there are subtle nuances between xilinx and altera beyond just the tools called and pins, right? Or are all the cores the same exactly?
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That's hard to tell, but hopefully, we just need a new top-level core. We used to build against a ProASIC3 in orpsocv2, and I don't think we did anything special for the cores we used there
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Closing due to inactivity
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Related Issues (20)
- Question: Different cores from the same provider HOT 1
- Question: `env` section problem. HOT 3
- Invalid choice: 'migrate-capi1-to-capi2' HOT 1
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- Generator instance that depends on other cores HOT 8
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