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async_fifo

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

axi4

AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

compile-time-init-build

C++ library for composing modular firmware at compile-time.

corundum

Open source FPGA-based NIC and platform for in-network compute

cpp_register

safe, no-cost and easy-to-use Cpp header to work safely with HW registers

crashsheets

ddr2_sdram

DDR2 SDRAM Controller

embedded_printf_traces

Compile-time optimized format and traces for bare-metal project with compile-time checks

embeddedsw

Xilinx Embedded Software (embeddedsw) Development

enxor-logic-analyzer

FPGA Logic Analyzer and GUI

eth_vlg

etl

Embedded Template Library

fft-cordic-hdl

FFT implementation using CORDIC algorithm written in Verilog.

fp23fftk

Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).

fpga-fixedpoint

A Verilog fixed-point lib: custom bit width, arithmetic, converting to float, with single cycle & pipeline version. 一个Verilog定点数库，提供算术运算、与浮点数的互相转换，包含单周期和流水线两种实现。

fpga-hash-table

Simple hash table on Verilog (SystemVerilog)

fpga-network-stack

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

fpgamake

Generates Makefiles to synthesize, place, and route verilog using Vivado

fpu

IEEE 754 floating point library in system-verilog and vhdl

fsm

Finite State Machine

fusesoc

Package manager and build abstraction tool for FPGA/ASIC development

ghostsd

GOST-based SDSC-card encryptor

hdl

HDL libraries and projects

litescope

Small footprint and configurable embedded FPGA logic analyzer

meta_types

Meta type operations that I could not find in std

modern-cpp-template

A template for modern C++ projects using CMake, Clang-Format, CI, unit testing and more, with support for downstream inclusion.

nco

Configurable NCO (numerically controlled oscillator) written in MyHDL using a pipelined CORDIC implementation

openlogicbit

Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.

optimumfpgaframework

Crossplatform FPGA Framework