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pg1770's Projects

django icon django

The Web framework for perfectionists with deadlines.

dspfilters icon dspfilters

A Collection of Useful C++ Classes for Digital Signal Processing

ec0 icon ec0

Version of the ec engineering calculator suitable for older versions of python

fpga-hdl icon fpga-hdl

A set of small Verilog projects, to simulate and implement on FPGA development boards

juce icon juce

The JUCE cross-platform C++ framework.

kakoune icon kakoune

mawww's experiment for a better code editor

mdsynth icon mdsynth

FPGA-based synthesizer in VHDL for the Xilinx Spartan-3A and Spartan-3E Starter Kits

opencl-aes icon opencl-aes

OpenCL support for OpenSSL (currently only AES is implemented)

pong icon pong

PONG game on Nexys3, in Verilog.

pong-1 icon pong-1

Pong game on an FPGA in Verilog.

sega-system-for-fpga icon sega-system-for-fpga

FPGA Sega in Verilog, for Xilinx Virtex, circa 2002. Has an emulator thrown in, to simplify FPGA debugging.

sequencer icon sequencer

Implemented a sequencer on an FPGA. Enclosed is the Verilog code

simpledj icon simpledj

A self-contained set of cross platform applications and audio plugins.

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