powerhuafei Goto Github PK

arm-neon

c++编程进行加速-Neon、openMp等

chisel

Chisel: A Modern Hardware Design Language

cnn_hw_accelerator

Hardware accelerator of a CNN on Xilinx ZYNQ running on PetaLinux

customizablecomputinglab.github.io

deeplearningsystem

Deep Learning System core principles introduction.

eep-tpu-sdk

Includes compiler and library for EEPTPU, you can develop your own application and run it on your board with EEPTPU IP.

firesim-nvdla

FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud

fpga-zynq

Support for Rocket Chip on Zynq FPGAs

free-tpu

Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classification, detection, and segmentation problem.

free-tpu-os

Free TPU OS running on the FPGA

free-tpu-v3plus-for-fpga

FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference

learning-nvdla-notes

NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:[email protected]

mnist-nnet-hls-zynq7020-fpga

to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj accelerate code in FPGA,and implacement in block design and with SDK app......

nvdla.github.io

NVDLA Web Content

nvdla_doc

Documentation for NVDLA.

nvdla_hw

RTL, Cmodel, and testbench for NVDLA

nvdla_sw

NVDLA SW

nvdla_vp

Virtual Platform for NVDLA

pocl

a clone of POCL that includes RISC-V newlib devices support and Vortex

pynq-accelerator

A easy general acc.

sjtu-courses

上海交通大学课程资料分享

sodla

Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated

tengine

Tengine is a lite, high performance, modular inference engine for embedded device

triton-linalg-ai-

Development repository for the Triton-Linalg conversion

v831-npu

全志科技 V831 NPU逆向工程 Reverse engineering the V831 npu

vortex

RISC-V GPGPU

yolov2_xilinx_fpga

A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard

yolov5-npu-rock-5

YoloV5 NPU for the RK3588 on Rock 5 or Orange Pi 5

zynq-nvdla

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.