pyfive-risc-v Goto Github PK
Type: Organization
Bio: PyFive - RISC-V libre silicon microcontroller design leveraging the new Google/SkyWater 130nm PDK
pyfive-risc-v's Projects
caravel_pyfive
circuitpython
CircuitPython - a Python implementation for teaching coding with microcontrollers
magic
Magic VLSI Layout Tool
open_pdks
PDK installer for open-source EDA tools and toolchains. Distributed with a setup for the Google/SkyWater 130nm process.
openlane
OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
openlane-baremetal
pyfive
PyFive - RISC-V libre silicon microcontroller design leveraging the new Google/SkyWater 130nm PDK
pyfive-mpw1-pcb
Breakout carrier for the MPW1 PyFive chip
pyfive-mpw1-postmortem
pyfive-risc-v.github.io
Pyfive Docs
pyfive-spi
SPI peripheral for Pyfive
pyfive_no2usb
OpenLane design for the no2usb core
pyfive_top_202011
Top level for the November shuttle
skywater-pdk
Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
vexriscv-netlist
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