Comments (2)
Here's how DefaultHandler
is implemented, it is an implementation based on sifive interrupt mechanism.
https://github.com/riscv-rust/gd32vf103xx-hal/blob/3e3b2921f4c9c0f8e7292e5f96d41ed45374680a/eclic-mode-hack.S#L117-L204
but it's not used for gd32vf103 in gd32vf103xx_hal crate, it use a Bumblebee core with a special interrupt mechanism eclic by default.
I will add an example later.
from longan-nano.
Thank you very much. Can you provide a case of how to use critical-section in the example code?
from longan-nano.
Related Issues (13)
- riscv64-unknown-elf toolchain HOT 2
- Huge binaries after objcopy HOT 2
- rust-lld: error: no memory region specified for section '.eh_frame', on Ubuntu 16 HOT 2
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- Does not compile with the default stable toolchain HOT 2
- examples just do nothing (hang/black) on longan nano lite HOT 2
- Is it possible to run the binary in QEMU? HOT 3
- Change RISC-V OpenOCD to Official Fork in README
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from longan-nano.