- Questasim
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V. Desalphine, S. Dashora, L. Mali, S. K, A. Raveendran & D. Selvakumar, "Novel Method for Verification and Performance Evaluation of a Non-Blocking Level-1 Instruction Cache designed for Out-of-Order RISC-V Superscaler Processor on FPGA" VLSI Design And Test 2020, doi: 10.1109/VDAT50263.2020.9190377.
I think the amount of work done is propotional to the amount of time spent listening Jazzz...