starkerfirst Goto Github PK
Name: Bohan Yang
Type: User
Company: University of Science and Technology of China
Bio: A senior undergraduate, doing computer and chip architecture research
Location: Hefei, Anhui, China
Bohan Yang's Projects
acc_dtqrd
Toy accelerator for Dual-Triangular QR Decomposition
adyna_deprecated
Building the Adyna accelerator in the gem5 system simulator frame
awesome-llm-inference
📖A curated list of Awesome LLM Inference Paper with codes, TensorRT-LLM, vLLM, streaming-llm, AWQ, SmoothQuant, WINT8/4, Continuous Batching, FlashAttention, PagedAttention etc.
awesome-mixture-of-experts-papers
A curated reading list of research in Mixture-of-Experts(MoE).
lc3_sim
LC3 simulator and assembler
neural-networks-on-silicon
This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
riscv-from-scratch
The code for the RISC-V from scratch blog post series.
starkerfirst.github.io
Yangbh's website page (forked from academicapages)
ustc_2022fa_computingmethod
An undergraduate class in 2022FA, focusing on numerical computing and analysis.
ustc_2022fa_computingphysics
An undergraduate course focusing on computing methods in physics.
ustc_2022fa_icdesign
Design a micro chip in TSMC .18um process, including a mips cpu (8 bit) and a systolic array accelerator
ustc_2022sp_computerorganizationdesign
An undergraduate course describing the components of a computer, especially RISC-V CPU.
ustc_2023fa_algorithm
Undergraduate course in 2023FA, introducing modern algorithms
ustc_2023sp_computerarch
Experiment repo including gem5, Tomasulo and Cuda
ustc_2023sp_os
An undergraduate class in 2023SP about operating system design
ustc_2023sp_parallelcomputing
USTC ParallelComputing labs repo in 2023SP, including MPI, OpenMP, CUDA, MapReduce(not available)
zynq-nvdla
NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
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