Comments (5)
I think it might be possible by creating a different Peripheral
struct for the PA9/PA10 pins that's available on certain devices, and having the enable
function remap them. Or alternatively have a special constructor for it.
Edit: ...to do the remapping without having to mess with the registers by hand, that is. It's probably not possible to detect which chips have which pins, because it's package dependent.
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I don't see how. The chips are just bonded into different packages and are not self-aware of how they're bonded.
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...to do the remapping without having to mess with the registers by hand, that is. It's probably not possible to detect which chips have which pins, because it's package dependent.
Yes, I meant this, sorry for the confusion @therealprof, I should have phrased that better :-S
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@brainstorm Thanks for the clarification. Yes, that makes absolute sense.
Want to take a stab at it?
from stm32f0xx-hal.
Sure, I have no idea on what I'm doing, but let's take it on PR #119 ;)
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Related Issues (20)
- Why does configuring a GPIO require a critical section in this hal? HOT 2
- cannot find value `RCC_PLLSRC_PREDIV1_SUPPORT` HOT 5
- SPI blocking transfers do not wait for completion. HOT 13
- First write on I2C bus never NACK's HOT 15
- bxcan/defmt version conflict HOT 3
- SPI on 0.17.1 is broken HOT 3
- More precise units for timers. HOT 1
- USART: Support half-duplex mode HOT 1
- rcc error HOT 1
- Flash Driver HOT 2
- How to use SysTick timer to count ticks from a rotary encoder? HOT 3
- Improve API to allow having an array of Analog pins HOT 1
- Cannot acknowledge timer interrupt flag
- Confused by features on f03x HOT 1
- Disabling GPIO clock HOT 1
- PWM on Special Channels? HOT 3
- Quadrature Encoder Interface
- Using timer1 channel 4 for ADC triggering
- STM32F072C8T6 -- wrong binary size? HOT 1
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