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Sumeet Kumar Sahoo's Projects

8bit_microcomputer_verilog icon 8bit_microcomputer_verilog

This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a breadboard, it has the functionalities of his computer and modelled using Verilog HDL. This was developed for the Mini Project in Digital Systems course in my 3rd semester at IIT Palakkad.

awesome-courses icon awesome-courses

:books: List of awesome university courses for learning Computer Science!

aws-ml-guide icon aws-ml-guide

[Video]AWS Certified Machine Learning-Specialty (ML-S) Guide

basic-simd-processor-verilog-tutorial icon basic-simd-processor-verilog-tutorial

Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clock cycle will be used to load values into the registers. The second will be for performing the operations. 6-bit opcodes are used to select the functions. The instruction code, including the opcode, will be 18-bit.

building-a-processor---project icon building-a-processor---project

Design of a simulated 8-bit single-cycle processor using Verilog HDL, which includes an ALU, a register file and other control logic

computer-engineering-projects icon computer-engineering-projects

Digital computer structure, Hardware Design Lab & Introduction to Computers for computer engineering projects in C, C#, Assembly, Pspice.

datasciencecoursera icon datasciencecoursera

Data Science Repo and blog for John Hopkins Coursera Courses. Please let me know if you have any questions.

educative.io_courses icon educative.io_courses

this is downloadings of all educative.io free student subscription courses as pdf from GitHub student pack

fpga icon fpga

BUAA Computer Organization Project8 FPGA

fpga_verilog_ballot_box-tp2-isl-ufv icon fpga_verilog_ballot_box-tp2-isl-ufv

Hardware description of a complete Ballot Box made in Verilog with implementation in FPGA-Altera-DE-2-155, made in Verilog with Quartus Prime in discipline ISL for computer science graduation.

huffman icon huffman

Using huffman coding to compress-decompress real-world files

huffman-coding-zipper icon huffman-coding-zipper

A "Huffman Coding" algorithm-based application written in C++ to compress/decompress any type of files.

interviewbit icon interviewbit

Collection of Abhishek Agrawal's gists solutions for problems on https://www.interviewbit.com

interviewbit-topicwise-solutions icon interviewbit-topicwise-solutions

The repository contains solutions to various problems on interviewbit. The code is merely a snippet (as solved on InterviewBit) & hence is not executable in a c++ compiler. The code written is purely original and completely my own.

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