Comments (1)
Hi Xinx
In accordance with JTAG conventions the output signal(TDO) have to be driven at the falling edge of TCK. So, the two stage synchronizer(with TCK destination clock) couldn’t be applied here.
There is a clock ration requirements(1:12) between TCK and system clock. It is guarantee that the signal on TDO will be stable when falling edge is coming.
Syntacore
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