tcutee Goto Github PK

100-gdb-tips

A collection of gdb tips. 100 maybe just mean many here.

arm-base-platform-fvp

Boot to Busybox on Arm AEM RevC FVP

arm-fvp-software-stack

For build arm software stack

baremetal_gicv3_v4

This example demonstrates the use of the Generic Interrupt Controller (GIC) in a baremetal environment.

boot-wrapper

Linux kernel boot wrapper for FAST Models

co_mips31

实现MIPS架构指令集下31条指令的单周期CPU，经过Vivado和Modelsim联合仿真通过并在Nexys4开发板上下板通过。

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

docker-ubuntu-desktop

Docker Image for Ubuntu Desktop which support HW GPU accelerated GUI apps. you can access the Container with ssh or remote desktop, just like Cloud VM.

ds-5-fvp-armv8-a

Firmware for run ARMv8-A on DS-5 FVP from https://community.arm.com/developer/tools-software/oss-platforms/w/docs/304/arm-reference-platforms-deliverables

examples

fpga-cpu

MIPS cpu on FPGA Nexys4 (31 instrs )

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

linux-software

build script file of rpi-arm64

mysummary

My Design Philosophy Summary (Most of them are in Chinese)

openmips

实现一个基础但功能完善的计算机系统,根据《自己动手写ＣＰＵ》实现，开发板为Nexys4 DDR

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

veerwolf

FuseSoC-based SoC for SweRV EH1 and EL2

veerwolf-a

VeeRwolf (a platform for the VeeR family of RISC-V cores) for Nexys Video Board: https://github.com/chipsalliance/VeeRwolf

vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

xv6-book-chinese

MIT操作系统工程的教学操作系统Xv6的源码剖析中文翻译项目，使用ANSI标准C重新在riscv架构上实现Unix v6；