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Sv3n avatar Sv3n commented on September 2, 2024
DRAMPower DRAMPower Comment DDR2 DDR3 DDR4 LPDDR LPDDR2 LPDDR3 WIDEIO_SDR
idd0 IDD0 IDD01
idd2n IDD2N IDD2N1
idd2p0 slow-exit precharged power-down IDD2P IDD2P1
idd2p1 fast-exit precharged power-down IDD2P IDD2PS1
idd3n IDD3N IDD3N1
idd3p0 slow-exit active power-down IDD3Ps IDD3P1
idd3p1 fast-exit active power-down IDD3Pf IDD3PS1 (?)
idd4r IDD4R IDD4R1
idd4w IDD4W IDD4W1
idd5 IDD5 IDD51
idd6 IDD6 IDD61
vdd VDD VDD1
idd02 x IDD02 + IDD0,in
idd2n2 x IDD2N2 + IDD2N,in
idd2p02 x IDD2P2 + IDD2P,in
idd2p12 x IDD2PS2 + IDD2PS,in
idd3n2 x IDD3N2 + IDD3N,in
idd3p02 x IDD3P2 + IDD3P,in
idd3p12 x IDD3PS2 + IDD3PS,in
idd4r2 x IDD4R2 + IDD4R,in
idd4w2 x IDD4W2 + IDD4W,in
idd52 x IDD52 + IDD5,in
idd62 x IDD62 + IDD6,in
vdd2 x VDD2

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kchandrasekar avatar kchandrasekar commented on September 2, 2024

These are numbers from the 3rd voltage domain (VDDca/VDDq), which we have
not explicitly modeled. So, I added the current for these domains with VDD2
since they have the same rating (1.2V).

2014-08-25 14:18 GMT+05:30 Sven Goossens [email protected]:

DRAMPower DRAMPower Comment DDR2 DDR3 DDR4 LPDDR LPDDR2 LPDDR3 WIDEIO_SDR
idd0 IDD0 IDD01 idd2n IDD2N IDD2N1 idd2p0 slow-exit precharged
power-down IDD2P IDD2P1 idd2p1 fast-exit precharged power-down IDD2P
IDD2PS1 idd3n IDD3N IDD3N1 idd3p0 slow-exit active power-down IDD3Ps
IDD3P1 idd3p1 fast-exit active power-down IDD3Pf IDD3PS1 (?) idd4r
IDD4R IDD4R1 idd4w IDD4W IDD4W1 idd5 IDD5 IDD51 idd6 IDD6 IDD61
vdd VDD VDD1 idd02 x IDD02 + IDD0,in idd2n2 x IDD2N2 +
IDD2N,in idd2p02 x IDD2P2 + IDD2P,in idd2p12 x IDD2PS2 + IDD2PS,in
idd3n2 x IDD3N2 + IDD3N,in idd3p02 x IDD3P2 + IDD3P,in idd3p12 x IDD3PS2

  • IDD3PS,in idd4r2 x IDD4R2 + IDD4R,in idd4w2 x IDD4W2 + IDD4W,in
    idd52 x IDD52 + IDD5,in idd62 x IDD62 + IDD6,in vdd2 x VDD2


Reply to this email directly or view it on GitHub
#5 (comment).

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Sv3n avatar Sv3n commented on September 2, 2024

The DDR4 mapping (comments tells which value to read from the datasheet):

    <parameter id="idd0"   value="58"  comment="IDD0" />
    <parameter id="idd02"  value="4"   comment="IPP0"  />
    <parameter id="idd2n"  value="44"  comment="IDD2N" />
    <parameter id="idd2p0" value="30"  comment="IDD2P" />
    <parameter id="idd2p1" value="30"  comment="IDD2P (copy)" />
    <parameter id="idd3n"  value="61"  comment="IDD3N" />
    <parameter id="idd3p0" value="44"  comment="IDD3P" />
    <parameter id="idd3p1" value="44"  comment="IDD3P (copy)" />
    <parameter id="idd4r"  value="140" comment="IDD4R" />
    <parameter id="idd4w"  value="156" comment="IDD4W" />
    <parameter id="idd5"   value="190" comment="IDD5B" />
    <parameter id="idd6"   value="20"  comment="IDD6N" />
    <parameter id="idd62"  value="0"   comment="Should be equal to IPP6N, but this value is not mentioned in the datasheet." />
    <parameter id="vdd"    value="1.2" comment="VDD"  />
    <parameter id="vdd2"   value="2.5" comment="VPP"  />

FYI, this particular set of values corresponds to a DDR4-1866 according to the latest(?) micron datasheet (4gb_ddr4_dram.pdf - Rev. B 10/14 EN), at speed grade -107E. Once I have had time to test with these numbers, I might update the full memspec that ships with drampower.

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lsteiner-tukl avatar lsteiner-tukl commented on September 2, 2024

The different current measurement conditions will be handeled internally in the new version 5.0 of DRAMPower.

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