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ahb2apb-bridge

An uvm verification env for ahb2apb bridge

amiq_blog

Code snippets from articles published on www.amiq.com/consulting/blog

awesome-chatgpt

basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog

chisel-bootcamp

Generator Bootcamp Material: Learn Chisel the Right Way

computationbook

Example code for Understanding Computation

doc

Documentation for NVDLA.

dougsociety

道格学社官方仓库

dracula-theme

:scream: A dark theme for all the things!

excel.vim

A simple vim plugin for displaying texts of an excel file.

hw

RTL, Cmodel, and testbench for NVDLA

hw_interview_questions

A collection of commonly asked RTL design interview questions

json-c

https://github.com/json-c/json-c is the official code repository for json-c. See the wiki for release tarballs for download. API docs at http://json-c.github.io/json-c/

labeled-risc-v

leaderf

An asynchronous fuzzy finder which is used to quickly locate files, buffers, mrus, tags, etc. in large project.

nutshell

RISC-V SoC designed by students in UCAS

nutshell-doc

opentitan

OpenTitan: Open source silicon root of trust

openwifi

open-source IEEE802.11/Wi-Fi baseband chip/FPGA design

ripgrep

ripgrep recursively searches directories for a regex pattern

riscv-dv

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

shadowsocks-windows

A C# port of shadowsocks

swerv_eh1

A directory of Western Digital’s RISC-V SweRV Cores

uvm-python

UVM 1.2 port to Python

uvm-tutorial-for-candy-lovers

Source code repo for UVM Tutorial for Candy Lovers

verilog_emacsauto.vim

verilog filetype plugin to enable emacs verilog-mode autos

vim-dragvisuals

Vim global plugin for dragging virtual blocks

vim-foldsearch

vim-win32-installer

Vim Win32 Installer