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kmurray avatar kmurray commented on May 19, 2024

Reported by jeffrey.goeders on 2012-01-20 18:17:53

  • Labels added: Module-ODIN

from vtr-verilog-to-routing.

kmurray avatar kmurray commented on May 19, 2024
Thank you for reporting this issue and helping improve ODIN II!

The memories are undergoing a major overhaul now. I have fixed the overflow problem
in the printout in my local version and it will be released to SVN as soon as we've
published our results. 

The depth ODIN II can handle depends on what optimizations you are doing, the amount
of RAM in your machine and which architecture you are mapping to. In your case, ODIN
II was splitting all memories down to a data width of 1, which resulted in poor mapping
performance on such a large memory block. If you remove the class="memory" from the
memory specifications in the architecture file you supplied, it will prevent ODIN II
from splitting all the memories down to 1 bit data. Then the compilation will succeed.



Reported by andy16666 on 2012-04-05 14:01:37

from vtr-verilog-to-routing.

kmurray avatar kmurray commented on May 19, 2024

Reported by andy16666 on 2012-04-05 14:09:41

  • Status changed: Fixed

from vtr-verilog-to-routing.

kmurray avatar kmurray commented on May 19, 2024
Added a configurable bound to memories.h. 

Reported by andy16666 on 2012-04-05 14:40:29

from vtr-verilog-to-routing.

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