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BUAA CO

北航计算机学院计算机组成原理课程设计

P0 项目名称: 部件及状态机设计(Logisim)

课下测试(PW): 搭建CRC校验码计算电路,ALU,正则表达式匹配

课上测试 (PT): Logisim完成部件及FSM设计

P1 项目名称:部件及状态机设计(Verilog-HDL)

课下测试(PW): 实现splitter, ALU,格雷码计数器,合法表达式识别

课上测试 (PT): Verilog-HDL完成部件及FSM设计

P2 项目名称:汇编语言

课下测试(PW): 矩阵乘法、排序、回文串判断

课上测试 (PT): 选择题+编程题

P3 项目名称:Logisim开发单周期CPU

课下测试(PW): 完成支持7条指令的单周期CPU设计

课上测试 (PT): 新增指令

P4 项目名称:Verilog开发单周期CPU

课下测试(PW): 完成支持7条指令的单周期CPU设计

课上测试 (PT): 新增指令

P5 项目名称:Verilog开发流水线CPU(1)

课下测试(PW): 完成支持10指令流水线CPU设计

课上测试 (PT): 流水线工程化方法

P6 项目名称:Verilog开发流水线CPU(2)

课下测试(PW): 完成支持50指令流水线CPU设计

课上测试 (PT): 流水线工程化方法

P7 项目名称:Verilog开发MIPS微系统(1)

课下测试(PW): 完成微型MIPS系统设计,开发简单I/O,验证中断

课上测试 (PT): 现场测试

P8 项目名称:Verilog开发MIPS微系统(2)

课下测试(PW): 完成微型MIPS系统设计,集成串口控制器,板级运行

课上测试 (PT): 现场测试

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