This project forked from develone/zedsdr
A software defined radio approach for the Digilent Zedboard
This repository contains a hardware design for a software defined radio based on the Ettus Research E100 USRP. It consists of a clock generator and an AD9862 ADC/DAC frontend. It is designed to be connected to the LPC connector on a Digilent Zedboard.
The hardware design is a work in progress. Any help or comments are appreciated.
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