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capacitivechess_hw's Issues

Improvements for PCB V0 -> V1

I edit this post to add what I see or feedback I get. Please add comments here if you see something not listed

20/12/2020

  • sharp LCD may need a (very big) pull down to DISP to have a clean screen during reset
  • text (1-8 a-h) need only soldermask opening not a separate copper text.

28/12/2020

  • need a battery reverse mount protection (O voltage drop)
  • maybe change the outer cell silk border. Ask on reddit what they prefer
  • LCD power supply must pass through a pin to keep DC balance ?

29/12/2020

  • power supply problem 200mV ripple when battery voltage is arround 3V
  • see if we can put Vbat pin to battery voltage monitoring and how much is power of consumption

31/12/2020

  • pay plugged vias to have flat surface
  • make a bigger board
  • see if it's possible to shield arround every detection surface on top also
  • USB D+/D- mixed up

02/01/2021

  • put the HW revision into copper layer
  • some tracks are not aligned on LQFP100 and FPC connector

03/01/2021

  • default state for EPD screen transistors when MCU not programmed
  • USB-C

09/01/2021

  • depth routing needs to adapt also the solder paste to not have paste in holes
  • USB power supply compliance

31/01/2021

  • if inductive detection doesn't work, use AH1925 or AH1806 hall sensors

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