This repository contains the source code for the papers PROLEAD - A Probing-Based Hardware Leakage Detection Tool and PROLEAD_SW - Probing-Based Software Leakage Detection for ARM Binaries. For a quick start, we recommend to watch the quick start guides on our Youtube Channel

PROLEAD allows to analyze the robust probing security of masked implementations provided as a Verilog netlist or ARM binary. In particular, PROLEAD supports the following features:

• Evaluation of masked hardware designs (Verilog netlists)

  • Consideration of glitches and transitions (simultaneously)
  • Univariate and multivariate adversaries

• Evaluation of masked software designs (ARM binaries)

  • Consideration of various micro-architectural effects (simultaneously)
    • Neighbor Leakage Effects
    • Bit-wise Interaction Leakages
    • Memory Overwrite Effects
    • Memory Remnant Effecs
    • Pipeline Register Overwrites
    • Pipeline Forwarding Effects
  • CPU-independent leakage detection

All information about the features and use of PROLEAD can be found in the Wiki.

Some selected examples can be found in the examples folder. More information regarding the examples can be found in the Wiki. We will provide more examples soon.

Please contact Nicolai Müller ([email protected]) if you have any questions, comments, if you found a bug that should be corrected, or if you want to reuse PROLEAD or parts of it for your own research projects.

• N. Müller, A. Moradi (2022): PROLEAD - A Probing-Based Hardware Leakage Detection Tool
• J. Zeitschner, N. Müller, A. Moradi (2023): PROLEAD_SW - Probing-Based Software Leakage Detection for ARM Binaries (pre-print)