bbogush / nand_programmer Goto Github PK

Hello,

I'm in desperate need of a Nand programmer. I found yours which is opensource, before ordering the parts I want to know if it's possible to erase the blocks by their number instead of fully erasing the chip?

I was testing a few chips I happened to have on hand and preparing to send in a PR, but I noticed the current bad block handling strategy might not be the best here. Suppose I have a 128MB chip with 4 bad blocks, the read result does not correlate to the actual data on flash, as I have 0x80000 of 0x00 at the very end of the buffer.

And if I load a 128MB file, the write operation will cause the program to error out too, because my file was "too large" if you subtract the 4 bad blocks.

Usually the "skip bad block" option in other things I've seen just increments the counter and skips the actual r/w operation, so fill bad blocks with FF in buffer for read and skipping writing/erasing entirely (discard data for bad blocks). This way we can still have a consistent, whole 128MB file without having to worry about manually recording the offsets and mangling with the binary with a hex editor to insert/remove blank bits.

The parallel flash chip database lists S43ML01G1, S43ML02G1, S43ML04G1 when these should be S34ML01G1, S34ML02G1, S34ML04G1 respectively.

backup.bin: Backup with nando, 268435456 Bytes (256MB)
Chip1 and Chip2: MX30LF2G18AC, (256MB)

Below logs:

1. Write backup.bin to chip1 --> success
2. Write backup.bin to chip2 --> Error: "Programmer sent error: (100) Operation address exceeded chip size"

The error happened sometimes but should less than 10% from my observation.

log of Chip 1:

Info: ID 0xc2 0xda 0x90 0x95 0x06
Info: Writing data ...
Info: Data has been successfully written

log of Chip 2:

Info: ID 0xc2 0xda 0x90 0x95 0x06
Info: Writing data ...
Info: "Skipped bad block at 0x0fb20000 size 0x00020000"
Info: "Skipped bad block at 0x0fca0000 size 0x00020000"
Error: "Programmer sent error: (100) Operation address exceeded chip size"

The third column in the GUI shows printable ASCII bytes, but is named ANCII. I assume this is a typo?

Is any big difference in work logic between K9K2G08U0M and K9F2G08U0B for example?

My quick research third symbol meaning
F : SLC Normal
K : SLC Die Stack
some of SLC Die Stack chips have 2 chip enable pin CE0/CE1 and CE0 but K9K2G08U0M has only one CE

I was wondering how 07FF interprets to 8 for the Page (address) Offset in the example provided in the Wiki page?
I was trying to figure out this variable for EN25Q32B chip but made no conclusion.
The rest of the instruction are all clear.

I started adding support for M29W640GB in the chip database before realising it was NOR flash (couldn't find all the timing info in the datasheet). Does this have any chance of working?

Thanks for making this excellent project. There are some small UI/UX improvements that I think would be cool to have:

• a progress bar at the bottom of the UI for the current operation, along with a rough ETA display
• a menu option to halt current operation, this might need firmware support as well (currently firmware goes entirely unresponsive and have to be power cycled to cancel)
• a push notification/msgbox/audible alert checkbox after completion, imo it'd be helpful since the r/w operations take such a long time, msgbox would be the easiest approach I think
• an operation that does write + verify, because so far if a user wants to verify the content, they'd have to read back the content and then manually diff it with an external utility

In the project https://github.com/dword1511/stm32-vserprog (libcopencm3) use STM32F103C8T6 PA4,5,6,7 to support spi nor flash

Similar to #8 and still 100% reproducible on my system on the latest commit. Additionally, removing -Wextra -Werror in qt.pro has no effect, as you can see they still show up in the output. I have tested gcc6 all the way to gcc10, gcc8 is the last version that will build the host application.

$ make
/../lib64/qt5/bin/uic main_window.ui -o ../build/ui/ui_main_window.h
/../lib64/qt5/bin/uic parallel_chip_db_dialog.ui -o ../build/ui/ui_parallel_chip_db_dialog.h
/../lib64/qt5/bin/uic settings_programmer_dialog.ui -o ../build/ui/ui_settings_programmer_dialog.h
/../lib64/qt5/bin/uic about_dialog.ui -o ../build/ui/ui_about_dialog.h
/../lib64/qt5/bin/uic firmware_update_dialog.ui -o ../build/ui/ui_firmware_update_dialog.h
/../lib64/qt5/bin/uic spi_chip_db_dialog.ui -o ../build/ui/ui_spi_chip_db_dialog.h
g++ -c -pipe -std=c++11 -O2 -Wall -Wextra -D_REENTRANT -fPIC -DQT_NO_DEBUG -DQT_WIDGETS_LIB -DQT_GUI_LIB -DQT_CORE_LIB -I. -I/usr/include/qt5 -I/usr/include/qt5/QtWidgets -I/usr/include/qt5/QtGui -I/usr/include/qt5/QtCore -I../build/moc -I../build/ui -I/../lib64/qt5/mkspecs/linux-g++ -o ../build/o/unix/main.o main.cpp
In file included from writer.h:9,
                 from programmer.h:12,
                 from main_window.h:9,
                 from main.cpp:6:
cmd.h:122:13: error: flexible array member ‘RespHeader::data’ not at end of ‘struct<unnamed>’
  122 |     uint8_t data[];
      |             ^~~~
cmd.h:128:15: note: next member ‘FwVersion <unnamed struct>::version’ declared here
  128 |     FwVersion version;
      |               ^~~~~~~
cmd.h:126:1: note: in the definition of ‘struct<unnamed>’
  126 | {
      | ^
cmd.h:122:13: error: flexible array member ‘RespHeader::data’ not at end of ‘struct<unnamed>’
  122 |     uint8_t data[];
      |             ^~~~
cmd.h:134:12: note: next member ‘ChipId <unnamed struct>::nandId’ declared here
  134 |     ChipId nandId;
      |            ^~~~~~
cmd.h:132:1: note: in the definition of ‘struct<unnamed>’
  132 | {
      | ^
cmd.h:122:13: error: flexible array member ‘RespHeader::data’ not at end of ‘struct<unnamed>’
  122 |     uint8_t data[];
      |             ^~~~
cmd.h:140:14: note: next member ‘uint32_t <unnamed struct>::addr’ declared here
  140 |     uint32_t addr;
      |              ^~~~
cmd.h:138:1: note: in the definition of ‘struct<unnamed>’
  138 | {
      | ^
cmd.h:122:13: error: flexible array member ‘RespHeader::data’ not at end of ‘struct<unnamed>’
  122 |     uint8_t data[];
      |             ^~~~
cmd.h:147:14: note: next member ‘uint32_t <unnamed struct>::ackBytes’ declared here
  147 |     uint32_t ackBytes;
      |              ^~~~~~~~
cmd.h:145:1: note: in the definition of ‘struct<unnamed>’
  145 | {
      | ^
cmd.h:122:13: error: flexible array member ‘RespHeader::data’ not at end of ‘struct<unnamed>’
  122 |     uint8_t data[];
      |             ^~~~
cmd.h:153:13: note: next member ‘uint8_t <unnamed struct>::errCode’ declared here
  153 |     uint8_t errCode;
      |             ^~~~~~~
cmd.h:151:1: note: in the definition of ‘struct<unnamed>’
  151 | {
      | ^
cmd.h:122:13: error: flexible array member ‘RespHeader::data’ not at end of ‘struct<unnamed>’
  122 |     uint8_t data[];
      |             ^~~~
cmd.h:159:14: note: next member ‘uint32_t <unnamed struct>::progress’ declared here
  159 |     uint32_t progress;
      |              ^~~~~~~~
cmd.h:157:1: note: in the definition of ‘struct<unnamed>’
  157 | {
      | ^
make: *** [Makefile:639: ../build/o/unix/main.o] Error 1

Here is an another variant of PCB for this great project. (Eagle 9 Format + PDF)
-Since the track clearance is .15mm, this PCB has to be made with Photo Resist film technic.
Toner transfer method is not precise enough.
-This is a double layer PCB so don't forget to solder VIAs.
-All the components except the USB connector are SMD.
-You can find the value of the components in the Eagle files.
-You can either use a 48pin ZIF IC Socket or 4 rows of pin headers in order to support 7.2mm and 15.24mm ZIFs.
-There are 18 pins of the socket which need a VIA wire. Other pins of ZIF socket and the USB connector are routed from Bottom layer.
NANDO Bottom.pdf
NANDO TOP.pdf
Nando_ZIF48_USBb.zip

Does NANDO support 56 pin NAND memories? If so, how is the pin assignment on the 48pin socket ?
I would be happy to design and share the PCB for such an adapter if it is possible.

I've added NRTS just like BOOT0 and made some changes in schematics to make it look better and readable.

nand_programmator.zip

Originally posted by @alexgrach in #14 (comment)

Ver. 3.5.0
Hangs when writing on the second BB.

(Info: "Bad block at 0x0035a840 size 0x00021000"
Info: "Bad block at 0x0035b080 size 0x00021000")
K9F1G8U0E

Doesn't work either - "Read bad blocks":
(Error: "Programmer sent error: (104) Failed to read chip")

Everything else works.
Windows 10 64x

EEPROM-SCL and EEPROM-SDA functions can be added using stm32f407vet6 pins 47 and 48

I will ask you to study the attached file to increase the programmer's database. If I can be useful in my work, I will help with pleasure!
https://github.com/Demiurge67/Rooter2021/blob/main/device.csv

Thank you for this project! I used the definition for K9G8G08U0A as a template for K9G8G08U0M which has a different ID:

K9G8G08U0M, 2048, 262144, 1073741824, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 236, 211, 20, 37, 100

Tested and confirmed working.

主频也比 STM32F103VCT6 高 而且还提升了写入速度

Thank you for sharing your great project.
Would you please provide the PDF version of NAND programmer schematic as well?
I can't install Kicad due to some hardware difficulties and will appreciate if you add the PDF version of the schematic to the repository.
Regards
Ciro

I am trying read/write on hy27uf084g2b with a stm32 (Blue Pill).

Serial info：

NAND programmer ver: 3.1.0
JTAG init...done.
LED init...done.
USB init...done.
CDC init...done.
ERROR: NAND read bad block info error at 0x0

chip：ESMT F59L2G81A

Is it possible to port you project from STM32F103VCT6 to STM32F103C8T6?

It would be nice to have reset button. I have to use a wire to reset before flashing over SWD by st-link.

I added the K9F1G08U0D chip, but there was an warning:"Warning: QXcbConnection: XCB error: 3 (BadWindow), sequence: 14950, resource id: 13199545, major code: 40 (TranslateCoords), minor code: 0". And The following prompt appears when I connect.
"Info: Detecting chip ...
Info: ID 0xcf 0xcf 0xcf 0xcf 0xcf
Info: ID 0x80 0x80 0x80 0x80 0x02
Info: Chip not found in database
Error: Chip size is not set
Error: Chip size is not set
Info: Chip page size is unknown
Info: Reading bad blocks ...
Info: Bad blocks have been successfully read"
The above operations are detected,erased,read,written and read bad blocks in sequence.
K9F1G08U0D-Samsung.pdf

1、STM32F103ZE核心板--原理图-1807M.pdf

I've just added configuration save for programmer config using QSettings. May be you'll find it usefull.
Also I have changed sprintf() to asprintf() to compile with qt-5.15.1
main_window.patch.zip

This is how my samsung chips read fine:
7134956@6ec011d

The LEDs are quite dim under normal ambient room lighting. I have built a few of these boards now and through experimentation found that from 100R to 330R are a more suitable brightness. For what its worth I spec'd the LEDs directly from the part numbers in the BOM.

You might consider replacing R3, R13, and R14 with lower value resistors in the HW design.

Hi,
I have FT232RL same board as here: https://www.sparkfun.com/products/12731

Is it possible to flash fimware nando_fw_v3_3_0.bin via arduino ide?Or another program suggestions?
Thanks in advance, very useful programmer btw.

0xe9A84E700BA7f6942C34e6B2766BfF04Ff9E7bb7

serialprint:
NAND programmer ver: 2.1.0
JTAG init...done.
LED init...done.

I tested on win7 and showed unrecognized USB devices. What went wrong. Can you help me?

Thanks for sharing. When I opened the nando projector in Windows10, the font was too small when I added the parallel chip database. What should I do to

Can the crystal is in HC49-SD package, 8MHz and 20pF load capacitance replace 8MHz and 18pF load capacitance when Cl1 and Cl2 aren't changed.

Hi！
I have a GD32F103VCT6 chip, can use it to replace STM32F103VCT6?

is it support BGA packaged nand?

Is it possible to add support for raspberry boards
It has all needed pins so there is no need to build a programmer pcb from scratch

I've just downloaded windows installer from google drive nando-3.3.0 folder. Help->About NANDO shows Version: 3.2.0

In China, there are a lot of particles whose factory labels have been erased and re labeled. Can we read six IDs directly in the nand programmer,We can query the particle information through professional (https://www.flashinfo.top/FlashInfo)

as title

Hi,

While porting the firmware, i tried to compile the host application, but i got the following error:

g++ (10.1.0)
error: flexible array member ‘RespHeader::data’ not at end of ‘struct<unnamed>’

similar issue with clang++(10.0.0)

error: field 'header' with variable sized type 'RespHeader' not at the end of a struct or class is a GNU extension

It seems older versions had a bug, where they didn't properly detect this issue.

Even thought data is the last member in RespHeader, it has to be last member as well in every other struct using RespHeader.

I tried to build firmware in two different ways:

1. I made project in IAR
2. I compiled firmware from existing sources in Debian by GCC compiler.

I flashed result and in both ways I received following error in UART terminal: ERROR: "Wrong buffer length for hal configuration command 37" and "Error: "Programmer sent error: (112) Wrong data length" in NANDO Qt application window.

I investigated a little.
That message is generated in nand_init function from fsmc_nand.c file, which called from np_cmd_nand_conf function nand_programmer.c file.

Cold you please help me find right direction to solve the issue?
My goal is to understand what's going on in such a big project)

When I flash precompiled firmware from google disk (nando_fw_v3_5_0.hex for example) then all OK.

SPI Chip Database

Name: EN25Q32B
Page size: 0x100 (256 bytes)
Block size: 0x1000 (4096 bytes)
Total size: 0x400000 (4194304 bytes)
Page offset: 8
Read: 0xb
Read Id: 0x9f
Write: 0x2
Write enable: 0x6
Erase: 0x20
Status: 0x5
Busy bit: 0
Busy bit state: 1
Frequency: 104000

Programmer can successfully read the chip ID and the flash memory contents but it won't erase and program it entirely. This can be seen every time memory is read into buffer.
I was wondering if I am doing something wrong!?

I see several restrictions that I have to work around.
uint32 is not enough for chip size.
Buffer needs to be moved to file.

Can show Effective(available) com port and put port select and connect at main window?

port select buttom
Com60 | connect!
V

These are even cheaper than the stm32f103, while way faster, also cheap development boards can be found everywhere, while the 100pin f103 is not commonly found.
Would it be very hard to add support for it?

Cheers

I've tried to read 2 different NAND ICs. No success.

Info: Connected to programmer
Info: Firmware version: 3.3.0
Info: Detecting chip ...
Info: ID 0x8F 0x8F 0x8F 0x8F 0x8F
Info: Chip not found in database
Info: Detecting chip ...
Info: ID 0x8F 0x8F 0x8F 0x8F 0x8F
Info: Chip not found in database

I have a STM32F407 board. Can I make it work on STM32F4 series?

Has anyone added TC58BVG0S3HTA00 ?
If you mark "Skip bad block", then - Error: "Programmer sent error: (104) Failed to read chip"
If you do not put a label - all right work.
Windows 10

There is a series of very old NAND from STMicroelectronics:

Datasheet: https://datasheetspdf.com/datasheet/NAND128-A.html

The problem we have here is that they use 2 different commands for reading 2 different halves of a page, so with the current software setup, we can only really read the 1st half of the page. Adding support for these chips will require additional work on the firmware and the Qt host application.

Do you think it's worth the time making changes to the fw and host application to add support for these chips, or should we file these off as "impossible to support" for now?